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19-1140; Rev 0; 9/96
Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX
_______________General Description
The MAX550B serial, 8-bit, voltage-output, digital-toanalog converter (DAC) operates on a single +2.5V to +5.5V supply. Its 1LSB TUE specification is guaranteed over temperature. Operating current (supply current plus reference current) is typically 75A with VDD = 2.5V and less than 1A in shutdown mode. The reference input is disconnected from the REF pin during shutdown. The serial interface operates at clock rates up to 10MHz and is compatible with 3-wire SPITM, QSPITM, and MicrowireTM interface standards. The MAX550B's ultra-low power consumption and small MAX package make it ideal for portable and batterypowered applications.
____________________________Features
o +2.5V to +5.5V Single-Supply Operation o 1LSB (max) TUE o Low 75A Operating Current (VDD = +2.5V) o 1A Shutdown Mode o MAX Package--50% Smaller than 8-Pin SO o 10MHz, 3-Wire Serial Interface o Internal Power-On Reset Clears All Registers to Zero
MAX550B
_______________Ordering Information ________________________Applications
VCXO Control Comparator Level Settings GaAs Amp Bias Control Digital Gain and Offset Control
PART MAX550BCPA MAX550BCUA MAX550BC/D MAX550BEPA MAX550BEUA TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 8 Plastic DIP 8 MAX Dice* 8 Plastic DIP 8 MAX
*Dice are specified at TA = +25C, DC parameters only.
________________Functional Diagram
VDD1
VDD2
__________________Pin Configuration
REF
TOP VIEW
DIN SCLK CS OUT 2 CS 3 INPUT SHIFT REGISTER 8 DAC REGISTER DAC R-2R LADDER OUT GND 1 8 VDD1 REF VDD2 SCLK
MAX550B
7 6 5
MAX550B
DIN 4
GND
DIP/MAX
SPI and QSPI are registered trademarks of Motorola, Inc. Microwire is a registered trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
ABSOLUTE MAXIMUM RATINGS
VDD1, VDD2, SCLK, DIN, CS, OUT to GND ...............-0.3V to +6V REF ...........................................................-0.3V to (VDD_ + 0.3V) Maximum Current (any pin) ...............................................50mA Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.1mW/C above +70C) ..............727mW MAX (derate 4.1mW/C above +70C) ......................330mW Operating Temperature Ranges MAX550BBC_A ...................................................0C to +70C MAX550BBE_A ................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER STATIC PERFORMANCE Resolution Differential Nonlinearity Total Unadjusted Error Zero-Code Error Full-Scale Error REFERENCE INPUT Reference Input Voltage Reference Input Resistance (Note 2) Reference Input Current (Note 3) DAC OUTPUT (OUT) DAC Output Voltage Swing DAC Output Resistance DIGITAL INPUTS (CS, SCLK, DIN) Input High Voltage Input Low Voltage Input Current Input Capacitance (Note 4) VIH VIL IIN CIN VIN = 0V or VDD_ 0.7VDD_ 0.3VDD_ 1 10 V V A pF ROUT 0 32 VREF V k VREF RREF IREF For specified performance DAC code = 55 hex DAC code = 55 hex VDD_ = VREF = 5.5V VDD_ = VREF = 2.5V 2.5 32 160 75 275 125 VDD V k A N DNL TUE ZCE FSE TA = +25C Guaranteed monotonic MAX550BBC_A/MAX550BBE MAX550BBEUA (Note 1) MAX550BBC_A/MAX550BBE MAX550BBEUA (Note 1) 8 0.9 0.9 1 1 1 1 Bits LSB LSB LSB LSB SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
ELECTRICAL CHARACTERISTICS (continued)
(VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER DYNAMIC PERFORMANCE Digital Feedthrough and Crosstalk Voltage-Output Settling Time Voltage-Output Slew Rate Wake-Up Time POWER SUPPLIES Supply Voltage Range Supply Current Shutdown Current VDD_ IDD1 + IDD2 Output unloaded, all inputs = GND or VDD VDD_ = 5.5V, output unloaded, all inputs = GND or VDD_ Shutdown mode 2.5 0.3 0.3 5.5 10 V A A SR CS = high, all digital inputs from 0V to VDD_ To 1/2LSB, CL = 20pF CL = 20pF CLOAD = 20pF VDD_ = 2.5V VDD_ = 5.5V 50 4 1.4 3.1 4 nV-sec s V/s s SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 1: Note 2: Note 3: Note 4:
0C to -40C testing guaranteed by design using six sigma design limits. Worst-case input resistance at REF occurs at DAC code 55 hex. Worst-case reference input current occurs at DAC code 55 hex. Guaranteed by design. Not production tested.
TIMING CHARACTERISTICS (Note 5)
(VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Digital inputs switching from 0V to VDD_.) PARAMETER SCLK Pulse Width High SCLK Pulse Width Low DIN to SCLK High Setup DIN to SCLK High Hold CS Low to SCLK High Setup CS High to SCLK High Setup SCLK High to CS Low Hold Delay, SCLK High to CS High CS Pulse Width High SCLK Period VDD_ High to CS Low SYMBOL tCH tCL tDS tDH tCSS0 tCSS1 tCSH0 tCSH1 tCSW tCP Power-on reset delay VDD_ = 2.5V VDD_ = 5.5V VDD_ = 2.5V VDD_ = 5.5V CONDITIONS MIN 40 40 30 0 10 30 30 20 10 20 40 80 5 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns s
Note 5: Guaranteed by design. Not production tested.
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
__________________________________________Typical Operating Characteristics
(VDD1 = VDD2 = 2.5V, VREF = VDD_, RL = 1M, CL = 15pF, TA = +25C, unless otherwise noted.)
OPERATING CURRENT vs. TEMPERATURE
150.2 OPERATING CURRENT (A) 149.8 149.4 75.4 75.0 VDD_ = VREF = 2.5V DAC CODE = FF hex 1k 10k 100k FREQUENCY (Hz) 1M 10M 74.6 -60 -20 20 TEMPERATURE (C) 60 100 VDD_ = VREF = 5.0V
MAX550 TOC-02 MAX550B-01
REFERENCE FREQUENCY RESPONSE
10 0 RELATIVE OUTPUT (dB) -10 -20 -30 -40 -50 VDD_ = 5V VREF = 2Vp-p SINE WAVE VDD_ = 2.5V VREF = 100mVp-p SINE WAVE
SHUTDOWN CURRENT vs. TEMPERATURE
MAX550 TOC-03
REFERENCE AC FEEDTHROUGH vs. FREQUENCY
MAX550 TOC-04
240 200 OPERATING CURRENT (nA) 160 120 40 36 32 28 -60 VDD_ = VREF = 2.5V VDD_ = VREF = 5.0V
0
RELATIVE OUTPUT (dB)
-20
-40
-60
-80 VREF = 1Vp-p SINE WAVE DAC CODE = 00 hex -100 -20 20 60 100 10 100 1k 10k 100k 1M TEMPERATURE (C) FREQUENCY (Hz)
4
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX
_____________________________Typical Operating Characteristics (continued)
(VDD1 = VDD2 = 2.5V, VREF = VDD_, RL = 1M, CL = 15pF, TA = +25C, unless otherwise noted.)
MAX550B
DIGITAL FEEDTHROUGH
MAX550 TOC-07
NEGATIVE SETTLING TIME
DAC CODE FF hex to 00 hex VREF = 2.5V
MAX550 TOC-08
VREF = 2.5V
SCLK, 5V/div
OUT, 1V/div
OUT, 50mV/div
CS, 5V/div
200ns/div
2s/div
OUTPUT GLITCH FILTERING
MAX550 TOC-05
POSITIVE SETTLING TIME
DAC CODE 00 hex to FF hex VREF = 2.5V
MAX550 TOC-06
CODE = 00 hex VDD_ = VREF = 2.5V
OUT, 50mV/div, CL = 0pF OUT, 50mV/div, CL = 100pF OUT, 50mV/div, CL = 220pF OUT, 50mV/div, CL = 1000pF CS, 5V/div
OUT, 1V/div
CS, 5V/div
5s/div
2s/div
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
______________________________________________________________Pin Description
PIN 1 2 3 4 5 6 7 8 NAME GND OUT CS DIN SCLK VDD2 REF VDD1 Ground DAC Output Voltage Chip-Select Input. A logic low on CS enables serial data to be clocked into the input shift register. Programming commands are executed at CS's rising edge. Serial Data Input. Data is clocked into the 16-bit input shift register on SCLK's rising edge. Serial Clock Input. Data is clocked in on SCLK's rising edge. Connect to VDD1 External Reference Voltage Input for DAC (2.5V to VDD_) Positive Power Supply (+2.5V to +5.5V) FUNCTION
R
R
R
R
R
R
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
REF GND LSB DAC REGISTER NOTE: SWITCH POSITIONS SHOWN FOR DAC CODE FF HEX. MSB
OUT GND
Figure 1. DAC Simplified Circuit Diagram
_______________Detailed Description
Analog Section
The MAX550B is an 8-bit, voltage-output digital-to-analog converter (DAC). The DAC consists of an R-2R ladder network that converts 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage (Figure 1). The MAX550B's output is unbuffered and has a typical output resistance of 32k. The power-supply range is from +2.5V to +5.5V.
Reference Input The voltage applied at REF sets the full-scale output for the DAC and may range from 2.5V to VDD_. The REF input resistance is code-dependent, with the lowest value (typically 32k) occurring when the DAC register is loaded with a code of 01010101 (55 hex). To minimize INL errors, the reference voltage source should have less than 6 output impedance.
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B MAX550B
INSTRUCTION EXECUTED
CS
SCLK
OPTIONAL PAUSE
DIN UB1 UB2 UB3 C2 C1 C0 AB1 AB2 D7 D6 D5 D4 D3 D2 D1 D0
Figure 2. Serial-Interface Timing Diagram
DAC Output The MAX550B's output is unbuffered; it connects directly to the R-2R ladder. This configuration minimizes power consumption and reduces offset errors. For highest accuracy, apply high resistive loads (1M and up). Lower resistive loads can be driven, but output loading increases full-scale error. The magnitude of the expected error is the ratio of the DAC output resistance to the DC load resistance at the output. Typically, an energy pulse is coupled into the DAC output on the rising edge of CS. Since the MAX550B's output is unbuffered (connected directly to the R-2R ladder), connecting a small capacitor (200pF to 1000pF) from the output to ground creates a lowpass filter that effectively suppresses the pulse for sensitive applications (see Output Glitch Filtering graph in the Typical Operating Characteristics). Shutdown Mode When the MAX550B is in shutdown mode, REF becomes high impedance. The supply current is unchanged, but the REF input current decreases to less than 1A. This allows the system reference to remain active with minimal power consumption. When exiting shutdown mode, the output recovery time is equivalent to the DAC settling time.
on rising edges of the serial clock signal (SCLK). The clock frequency can be as high as 10MHz. When writing to the DAC, transmit data MSB first in one 16-bit word or two 8-bit bytes. The write cycle can be segmented when CS is kept active (low) to allow two 8-bit-wide transfers. After clocking all 16 bits into the input shift register, a rising edge on CS programs the DAC. The DAC output reflects the data stored in the DAC register. Figure 3 gives detailed timing information.
Initialization The MAX550B has an internal power-on reset. At power-up, all internal registers are reset to zero; therefore, an initialization write is not necessary. Serial Input Data Format and Control Codes The control byte programs the DAC (Table 1). Table 2 lists the MAX550B's serial-input command format. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally; every control bit performs one function. Data is clocked in starting with unassigned bit 1 (UB1), followed by the remaining control bits and the DAC data byte. The LSB (D0) of the data byte is the last bit clocked into the input shift register (Figure 2).
Table 3 is an example of a 16-bit word. It performs the following functions: 1) Load 80 hex (128 decimal) into the DAC register. 2) Update the DAC output on CS's rising edge. Table 4 shows how to calculate the output voltage based on the input code.
Serial Interface
The MAX550B interface is compatible with 3-wire SPITM, QSPITM, and MicrowireTM microprocessor (P) interface standards. An active-low chip select (CS) enables the input shift register to receive data from the serial input, DIN (Figure 2). Data is clocked into the input shift register
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
CS
tCSH0 tCSS0 tCH tCSH1
tCSW
SCLK
tDS tDH
tCL
tCSS1
DIN
Figure 3. Detailed Serial-Interface Timing Diagram
Table 1. Control-Byte/Input-Word Bit Definitions
UB1* UB2 UB3 C2 C2 C1 Control Byte C1 C0 C0 AB1 AB2 D7 D6 D5 Data Byte D4 D3 D2 D1 D0** X = Don't care *Clocked in first **Clocked in last 1 0 1 0 1 X X X X X X X X X X X 0 1 0 Unassigned Bit 1 Unassigned Bit 2 Unassigned Bit 3 Power-Up Mode Power-Down Mode DAC Register Load Operation Disabled DAC Register Load Operation Enabled DAC Output Updated on Rising Edge of CS Unassigned Operation Assigned Bit 1 Assigned Bit 2 DAC Data Bit 7 (MSB) DAC Data Bit 6 DAC Data Bit 5 DAC Data Bit 4 DAC Data Bit 3 DAC Data Bit 2 DAC Data Bit 1 DAC Data Bit 0 (LSB)
Microprocessor Interfacing The MAX550B serial interface is compatible with Microwire, SPI, and QSPI interface standards. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the idle clock state to zero and CPHA = 0 changes data at SCLK's falling edge. This setting allows SPI to run at full clock speeds (1.5MHz). If a serial port is not available on your P, three bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the DAC output by operating the serial clock only when necessary.
--------------Applications
Information
Power-Supply and Ground Considerations
Connect GND to the highest-quality ground available. Bypass VDD with a 0.1F to 0.22F capacitor to GND. The reference input can be used without bypassing. However, for optimum line/load-transient response and noise performance, bypass the reference input with a 0.1F to 4.7F capacitor to GND. Careful PC board layout minimizes crosstalk between the DAC output, the reference, and the digital inputs. Separate analog traces by running ground traces between them. Make sure high-frequency digital lines are not routed parallel to analog lines.
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
Table 2. Serial-Interface Programming Commands
CONTROL BYTE Loaded First UB1 UB2 UB3 C2 X X X X X X X X X 0 X 0 C1 0 X 1 C0 AB1 AB2 D7 0 1 0 0 X 0 1 X 1 X X D6 X X D5 X X D4 X X D3 X X DATA BYTE Loaded Last D2 X X D1 X X D0 X X On CS's rising edge, wake up DAC. DAC register unchanged. Unassigned command On CS's rising edge, load DAC register. Wake up DAC (if previously powered down). X X X On CS's rising edge, power down DAC. DAC output goes to zero. DAC register unchanged. On CS's rising edge, power down DAC and update DAC register. DAC output goes to zero. COMMAND
8-bit DAC data
X
X
X
1
0
0
0
1
X
X
X
X
X
X
X
X
1
1
0
0
1
8-bit DAC data
X = Don't Care
Table 3. Example Input Word
Loaded First UB1 X UB2 X UB3 X C2 0 C1 1 C0 0 AB1 0 AB2 1 D7 1 D6 0 D5 0 D4 0 D3 0 D2 0 Loaded Last D1 0 D0 0
X = Don't Care
Table 4. Analog Output vs. Code
DAC REGISTER CONTENTS D7 1 1 1 0 0 0 D6 1 0 0 1 0 0 D5 1 0 0 1 0 0 D4 1 0 0 1 0 0 D3 1 0 0 1 0 0 D2 1 0 0 1 0 0 D1 1 0 0 1 0 0 D0 1 1 0 1 1 0 ANALOG OUTPUT (V) +VREF x (255/256) +VREF x (129/256) +VREF x (128/256) = +VREF/2 +VREF x (127/256) +VREF x (1/256) 0
Note: 1LSB = VREF x 2-8 = VREF(1/256) ANALOG OUTPUT = +VREF(I/256), where I = Integer Value of Digital Input and wake up DAC (if previously powered down)
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
AC Considerations
Digital Feedthrough High-speed data at any of the digital input pins may couple through the DAC's internal stray capacitance and cause noise (digital feedthrough) at the DAC output, even though CS is held high. This digital feedthrough is tested by holding CS high and toggling the digital inputs from all 1s to all 0s. Analog Feedthrough Due to internal stray capacitance, higher-frequency analog input signals at REF may couple to the output, even when the input digital code is all 0s. Test analog feedthrough by setting the DAC output to 0V and sweeping REF.
___________________Chip Information
TRANSISTOR COUNT: 1562
________________________________________________________Package Information
E D A3 A A2 E1
DIM A A1 A2 A3 B B1 C D1 E E1 e eA eB L INCHES MAX MIN 0.200 - - 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 - 0.100 - 0.300 0.400 - 0.150 0.115 INCHES MIN MAX 0.348 0.390 0.735 0.765 0.745 0.765 0.885 0.915 1.015 1.045 1.14 1.265 MILLIMETERS MIN MAX - 5.08 0.38 - 3.18 4.45 1.40 2.03 0.41 0.56 1.14 1.65 0.20 0.30 0.13 2.03 7.62 8.26 6.10 7.87 2.54 - 7.62 - - 10.16 2.92 3.81 MILLIMETERS MIN MAX 8.84 9.91 18.67 19.43 18.92 19.43 22.48 23.24 25.78 26.54 28.96 32.13
21-0043A
L A1 e B D1
0 - 15 C B1 eA eB
Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.)
PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24
10
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B MAX550B
___________________________________________Package Information (continued)
DIM
C A 0.101mm 0.004 in B A1 L
e
A A1 B C D E e H L
INCHES MAX MIN 0.044 0.036 0.008 0.004 0.014 0.010 0.007 0.005 0.120 0.116 0.120 0.116 0.0256 0.198 0.188 0.026 0.016 6 0
MILLIMETERS MIN MAX 0.91 1.11 0.10 0.20 0.25 0.36 0.13 0.18 2.95 3.05 2.95 3.05 0.65 4.78 5.03 0.41 0.66 0 6
21-0036D
E
H
8-PIN MAX MICROMAX SMALL-OUTLINE PACKAGE
D
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Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in MAX MAX550B
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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